A new CDMA transmitter for high-speed serial links

Author

Al-Taee, Alaa R. ; Fei Yuan ; Ye, Andy

Author_Institution

Dept. of Electr. & Comput. Eng., Ryerson Univ., Toronto, ON, Canada

fYear

2013

fDate

27-30 April 2013

Firstpage

1

Lastpage

4

Abstract

Conventional CDMA serial links suffer from the drawback that the number of transmitters is limited to only two in practical implementations due to the reduced voltage spacing between adjacent logic states of the transmitted data. In this paper, we propose a new CDMA serial link architect that allows an arbitrary number of transmitters to transmit data over the same channel simultaneously while keeping the voltage spacing between adjacent logic states of the transmitted data to be the same as that of 4-PAM serial links. The effectiveness of the proposed architect is validated using the simulation results of a serial link with four transmitters designed in an IBM 130 nm 1.2V CMOS technology.

Keywords

CMOS integrated circuits; code division multiple access; logic circuits; pulse amplitude modulation; radio transmitters; 4-PAM serial link; CDMA transmitter; IBM CMOS technology; adjacent logic state; data transmission; high-speed serial link; pulse-amplitude-modulation; size 130 nm; voltage 1.2 V; voltage spacing reduction; Bandwidth; Multiaccess communication; Multiplexing; Noise; Reliability; Simulation; Transmitters; 4-PAM; CDMA; Multi-level signaling; Serial link;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Communications and Photonics Conference (SIECPC), 2013 Saudi International

Conference_Location

Fira

Print_ISBN

978-1-4673-6196-5

Electronic_ISBN

978-1-4673-6194-1

Type

conf

DOI

10.1109/SIECPC.2013.6550775

Filename

6550775