Metrology and inspection challenges for manufacturing 3D stacked IC´s

In this paper we discuss the numerous metrology and inspection challenges that need to be overcome to really have high volume manufacturing of 3D integrated chips. The key metrology and inspections issues are addressed module wise. We start with the TSV module then move on to the wafer bonding and thinning module. This is followed by the bumping module, de-bonding module and finally we finish with the stacking module. Within each of the modules we show the possible solutions for metrology and inspection and also discuss limitations of the available metrology and inspection if it is warranted.