Title :
Defect sampling methodology for yield learning during 22nm process development
Author :
Chen Xu ; Lee, Jeyull ; Sachan, Vikas ; Patterson, Oliver D.
Author_Institution :
IBM Microelectron., East Fishkill, NY, USA
Abstract :
During early semiconductor process development, the demand for wafer inspection and scanning electron microscope (SEM) review is very high. This is because learning from other metrics such as functional test and even in-line test structures is limited as they require good functionality from multiple modules. Therefore it is critical to be very efficient in the use of wafer inspection and SEM review resources. SEM review is necessary for determining the Pareto of defects detected with brightfield (BF) inspection because BF images are not sufficient for classification. Typically, a selection of defects from the BF inspection are sampled for SEM review and the SEM classifications of these defects are then used to infer the defect types from the entire data set in a progress called normalization. In this paper, a number of pitfalls in the defect selection and normalization processes are reviewed. Best practices based on a number of studies at IBM for how to select the review sample and how many defects to sample are recommended.
Keywords :
Pareto analysis; inspection; integrated circuit yield; scanning electron microscopy; semiconductor device manufacture; IBM; Pareto defects; SEM; brightfield images; brightfield inspection; defect sampling methodology; functional test; in-line test structures; multiple modules; normalization process; scanning electron microscope; semiconductor process development; size 22 nm; wafer inspection; yield learning; Indexes; Inspection; Microelectronics; Repeaters; Scanning electron microscopy; Sociology; Statistics;
Conference_Titel :
Advanced Semiconductor Manufacturing Conference (ASMC), 2013 24th Annual SEMI
Conference_Location :
Saratoga Springs, NY
Print_ISBN :
978-1-4673-5006-8
DOI :
10.1109/ASMC.2013.6552817