DocumentCode
616520
Title
A fully parallel truncated Viterbi decoder for Software Defined Radio on GPUs
Author
Rongchun Li ; Yong Dou ; Yu Li ; Shi Wang
Author_Institution
Nat. Lab. for Parallel & Distrib. Process., Nat. Univ. of Defense Technol., Changsha, China
fYear
2013
fDate
7-10 April 2013
Firstpage
4305
Lastpage
4310
Abstract
Software-Defined Radio (SDR) on the Graphics Processing Unit (GPU) platform. We exploit a map-reduce strategy based on the three-point Viterbi decoding algorithm (TVDA) due to the high parallelization potential. The trellis of Viterbi decoding algorithm can be divided into sub-trellises in truncation, which can perform independent forward metrics computing and trace-back procedure in parallel. The parallel Viterbi decoding algorithm is mapped on a GPU named NVIDIA GTX580. The experiment shows that our method shows low BER and 36.0x speedup over a C implementation on a CPU with the frequency of 2.0GHz. At the meantime, our method achieves a performance improvement of 1.2x-3.6x times that of the existing GPU-based implementation.
Keywords
Viterbi decoding; graphics processing units; software radio; trellis codes; CPU; GPU; NVIDIA GTX580; SDR; TVDA; forward metric computing; frequency 2.0 GHz; fully parallel truncated Viterbi decoder; graphics processing unit; low BER; map-reduce strategy; software defined radio; subtrellises codes; three-point Viterbi decoding algorithm; trace-back procedure; Bit error rate; Decoding; Graphics processing units; Instruction sets; Merging; Signal processing algorithms; Viterbi algorithm; CUDA; Graphics Processing Unit (GPU); Software-defined Radio (SDR); Viterbi Decoder;
fLanguage
English
Publisher
ieee
Conference_Titel
Wireless Communications and Networking Conference (WCNC), 2013 IEEE
Conference_Location
Shanghai
ISSN
1525-3511
Print_ISBN
978-1-4673-5938-2
Electronic_ISBN
1525-3511
Type
conf
DOI
10.1109/WCNC.2013.6555270
Filename
6555270
Link To Document