A fine time-resolution (≪ 3 ps-rms) time-to-digital converter for highly integrated designs

A multi-channel 3-ps-rms single-shot precision timeto-digital converter (TDC) is presented. The time interpolation is based on a delay-locked-loop (DLL) employing resistive interpolation to achieve least-significant-bit (LSB) sizes as small as 5 ps. To calibrate out device mismatches, only the timing-reference signals need to be calibrated. The usual need for calibrating each channel individually is avoided. After calibration, the measured differential-non-linearity (DNL) and integral-non-linearity (INL) are ±0.9 LSB and ±1.3 LSB respectively. A prototype, implemented in a commercial 130 nm technology, consumes between 34mW to 42 mW/channel and shows a voltage sensitivity of -0.19 ps/mV and a temperature dependence of 0.44 ps/°C. To the best of our knowledge this is the first time a TDC demonstrates single-shot precisions on multiple channels smaller than 3ps-rms.