DocumentCode :
618315
Title :
The design of high speed UART
Author :
Agrawal, R.K. ; Mishra, Vivek Ranjan
Author_Institution :
VLSI Dept., VIT Univ., Vellore, India
fYear :
2013
fDate :
11-12 April 2013
Firstpage :
388
Lastpage :
390
Abstract :
Universal asynchronous receiver transmitter, abbreviated UART is a integrated circuit used for serial communications over a computer or peripheral device serial port. UARTs are now commonly included in microcontrollers. The universal designation indicates that the data format and transmission speeds are configurable and that the actual electric signaling levels and methods (such as differential signaling etc.) typically are handled by a special driver circuit external to the UART. Baud rate of 20Mbps using clock of 20MHz is used. FIFO (First-In-First Out) is used to store data temporarily during high speed transmission to get synchronization. The design is synthesized in Verilog HDL and reliability of the Verilog HDL implementation of UART is verified by simulated waveforms. We are using Cadence tool for simulation and synthesis.
Keywords :
data communication equipment; driver circuits; hardware description languages; peripheral interfaces; Cadence tool; FIFO; UART design; Verilog HDL; bit rate 20 Mbit/s; computer; data format; driver circuit; electric signaling level; first-in-first out; frequency 20 MHz; integrated circuit; microcontroller; peripheral device serial port; serial communication; universal asynchronous receiver transmitter; universal designation; Clocks; Computer architecture; Conferences; Generators; Hardware design languages; Receivers; Transmitters; Baud Rate Generator; DART; FIFO; High speed; Receiver; Transmitter;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Information & Communication Technologies (ICT), 2013 IEEE Conference on
Conference_Location :
JeJu Island
Print_ISBN :
978-1-4673-5759-3
Type :
conf
DOI :
10.1109/CICT.2013.6558126
Filename :
6558126
Link To Document :
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