DocumentCode :
618420
Title :
Simplified design method for fully differential gain-boosted folded cascade OTA
Author :
Ghosh, Narendra Nath ; Todani, R. ; Chaudhuri, Chandrima ; Mal, A.K.
Author_Institution :
Dept. of Electron. & Commun. Eng., Nat. Inst. of Technol., Durgapur, India
fYear :
2013
fDate :
11-12 April 2013
Firstpage :
943
Lastpage :
948
Abstract :
Operational amplifiers are an integral part of analog and mixed signal design. With the advancement of process technology, the transistor dimensions are rapidly scaling down leading to reduced ro. In deep sub-micron regime, this leads to a fairly small low frequency gain offered by amplifiers. Applications demanding high gain amplifiers suffer at design level. Even multi-stage architectures fail to provide gain greater than 60 dB. Designers now have to depend on alternate techniques like gain boosting architectures. For most designers, designing gain boosting structures using traditional design method become a trivial problem. They often find it difficult to keep all transistors in saturation, particularly in cascode structures. In this work, a simplified design method for designing a fully differential gain boosted folded cascode amplifier is presented. Potential Distribution Method (PDM) guarantees that all transistors are operating in saturation region. PDM is an extremely simple and quick methodology, which is independent of process technology, device length and complex equations governing the devices and the circuit. The implemented design provides a DC gain of around 118 dB with a unity gain frequency of 183 MHz. The design is carried out using UMC 180 nm CMOS technology and the simulation results are presented.
Keywords :
CMOS integrated circuits; differential amplifiers; operational amplifiers; transistors; CMOS technology; PDM; UMC; analog signal design; cascode structures; complex equations; deep sub-micron regime; design level; design method; device length; differential gain boosted folded cascode amplifier; differential gain-boosted folded cascode OTA; gain boosting architectures; gain boosting structures; gain frequency; high gain amplifiers; low frequency gain; mixed signal design; multistage architectures; operational amplifiers; potential distribution method; process technology; saturation region; transistor dimensions; Boosting; Gain; Logic gates; MOS devices; Mathematical model; Power dissipation; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Information & Communication Technologies (ICT), 2013 IEEE Conference on
Conference_Location :
JeJu Island
Print_ISBN :
978-1-4673-5759-3
Type :
conf
DOI :
10.1109/CICT.2013.6558231
Filename :
6558231
Link To Document :
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