Title :
Vernier SI/PI co-simulation
Author_Institution :
PC Client Group, Intel Corp., Hillsboro, OR, USA
Abstract :
The majority of time and effort spent to analyze and design a PC interconnect is not well served by commercial SI/PI tools. This paper examines those usage models and suggests improvements that would result in higher adoption rates of commercial SI/PI tools.
Keywords :
electronic design automation; PC interconnect design; Vernier SI-PI co-simulation; adoption rates; commercial SI-PI tools; Accuracy; Analytical models; Bit error rate; Layout; Predictive models; Silicon; Switches; BER; HVM; SI/PI; co-simulation; interconnect;
Conference_Titel :
Signal and Power Integrity (SPI), 2013 17th IEEE Workshop on
Conference_Location :
Paris
Print_ISBN :
978-1-4673-5678-7
DOI :
10.1109/SaPIW.2013.6558317
