DocumentCode :
618813
Title :
Combined bus splitting and line bypassing for short-circuit currents limitation
Author :
Kanlaya, Pittawat ; Hoonchareon, Naebboon
Author_Institution :
Dept. of Electr. Eng., Chulalongkorn Univ., Bangkok, Thailand
fYear :
2013
fDate :
15-17 May 2013
Firstpage :
1
Lastpage :
6
Abstract :
When a fault occurs in the power system, it causes a high short-circuit currents which over circuit breaker rate. This paper proposes solutions to limit high short-circuit currents using bus splitting and line bypassing. Both of solution methods are the restructuring of the network, stability of the system must be changed. Therefore, the stability has to be measured by PQ voltage stability index. There are four test cases to compare the result that consist of base case, short-circuit currents limitation using only bus splitting, short-circuit currents limitation using only line bypass and short-circuit currents limitation using both of bus splitting and line bypassing. The result show that all of the proposed methods can be reduced the short-circuit currents which been in range of circuit breaker limit. This paper has been tested on the modified IEEE 24 bus reliability test system.
Keywords :
circuit breakers; power system reliability; power system stability; short-circuit currents; bus splitting; circuit breaker rate; line bypassing; reliability test system; short-circuit currents limitation; voltage stability index; Circuit breakers; Circuit stability; Indexes; Load flow; Power system stability; Short-circuit currents; Stability criteria; Bus Splitting; Line bypassing; PQ Voltage Stability Index; Short-Circuit Currents Limitation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON), 2013 10th International Conference on
Conference_Location :
Krabi
Print_ISBN :
978-1-4799-0546-1
Type :
conf
DOI :
10.1109/ECTICon.2013.6559599
Filename :
6559599
Link To Document :
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