DocumentCode
619535
Title
A layout-based approach for Multiple Event Transient analysis
Author
Ebrahimi, Mojtaba ; Asadi, Hamed ; Tahoori, Mehdi B.
Author_Institution
Karlsruhe Inst. of Technol., Karlsruhe, Germany
fYear
2013
fDate
May 29 2013-June 7 2013
Firstpage
1
Lastpage
6
Abstract
With the emerging nanoscale CMOS technology, Multiple Event Transients (METs) originated from radiation strikes are expected to become more frequent than Single Event Transients (SETs). In this paper, a fast and accurate layout-based Soft Error Rate (SER) estimation technique with consideration of both SET and MET fault models is proposed. Unlike previous techniques in which the adjacent MET sites are obtained from logic-level netlist, we perform a comprehensive layout analysis to extract MET adjacent cells. It is shown that layout-based technique is the only effective solution for identification of adjacent cells as netlist-based techniques significantly underestimate the overall SER.
Keywords
CMOS integrated circuits; integrated circuit layout; integrated circuit modelling; logic design; radiation hardening (electronics); transient analysis; CMOS technology; adjacent cells identification; fault models; layout analysis; layout-based technique; logic-level netlist; multiple event transient analysis; multiple event transients; netlist-based techniques; single event transients; soft error rate estimation technique; Benchmark testing; Estimation; Integrated circuit modeling; Layout; Logic gates; Runtime; Transient analysis; Error propagation; Soft errors; Transient errors;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (DAC), 2013 50th ACM/EDAC/IEEE
Conference_Location
Austin, TX
ISSN
0738-100X
Type
conf
Filename
6560693
Link To Document