• DocumentCode
    621078
  • Title

    InP/InGaAs DHBT technology using SiN/SiO2 sidewall spacers

  • Author

    Kashio, Norihide ; Kurishima, Kenji ; Ida, Minoru ; Matsuzaki, Hideaki

  • Author_Institution
    NTT Photonics Labs., NTT Corp., Atsugi, Japan
  • fYear
    2013
  • fDate
    19-23 May 2013
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    This paper describes 0.25-μm-emitter InP/InGaAs DHBT technology that uses SiN/SiO2 sidewall spacers. The technology enables the fabrication of HBTs with a passivation ledge (0.10-μm width) and narrow base metal (<; 0.25 μm). The fabricated HBT exhibits a high current gain of over 50 and an ft of 491 GHz at a collector current density of 18 mA/μm2.
  • Keywords
    III-V semiconductors; current density; gallium arsenide; heterojunction bipolar transistors; indium compounds; passivation; silicon compounds; DHBT technology; InP-InGaAs; SiN-SiO2; collector current density; current gain; double heterojunction bipolar transistor; emitter; fabricated HBT; fabrication; passivation ledge; sidewall spacer; size 0.25 mum; Current density; Gain; Heterojunction bipolar transistors; Indium phosphide; Metals; Passivation; Silicon compounds; InP DHBT; ledge passivation; sidewall spacer;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Indium Phosphide and Related Materials (IPRM), 2013 International Conference on
  • Conference_Location
    Kobe
  • ISSN
    1092-8669
  • Print_ISBN
    978-1-4673-6130-9
  • Electronic_ISBN
    1092-8669
  • Type

    conf

  • DOI
    10.1109/ICIPRM.2013.6562650
  • Filename
    6562650