DocumentCode :
621293
Title :
ESD protection using BIMOS transistor in 100 GHz RF application for advanced CMOS technology
Author :
Galy, Ph ; Lim, Taegu ; Jimenez, Joaquin ; Heitz, B. ; Benech, Ph ; Fournier, J.-M. ; Marin-Cudraz, David
Author_Institution :
STMicroelectron., Crolles, France
fYear :
2013
fDate :
29-31 May 2013
Firstpage :
199
Lastpage :
202
Abstract :
The aim purpose of this study is to evaluate the ESD protection using BIMOS transistor in the RF and fast swing application for advanced CMOS technology in 32 nm high k metal gate & bulk substrate. The ESD target is 1kV HBM and the RF one is 100 GHz broadband. Moreover the DC behavior is also performed. Thus, the challenge here is to be efficient in ESD protection with a minimum of parasitic capacitance. To address these specifications the solution discussed in this paper uses the Bimos transistor characterized through TLP and DC measurements. A RF model is proposed and calibrated thanks to S parameters. Moreover, the R parameter range is investigated to the full 100GHz frequency range.
Keywords :
BiCMOS integrated circuits; MOSFET; S-parameters; capacitance; electrostatic discharge; high-k dielectric thin films; radiofrequency integrated circuits; BIMOS transistor; DC behavior; DC measurement; ESD protection; HBM; RF application; RF model; S parameter; TLP; advanced CMOS technology; bulk substrate; frequency 100 GHz; high k metal gate; parameter range; parasitic capacitance; size 32 nm; swing application; voltage 1 kV; BiCMOS integrated circuits; CMOS integrated circuits; Electrostatic discharges; Logic gates; Parasitic capacitance; Radio frequency; Transistors; BIMOS transistor; CMOS; ESD protection; RF;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
IC Design & Technology (ICICDT), 2013 International Conference on
Conference_Location :
Pavia
Print_ISBN :
978-1-4673-4740-2
Electronic_ISBN :
978-1-4673-4741-9
Type :
conf
DOI :
10.1109/ICICDT.2013.6563336
Filename :
6563336
Link To Document :
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