Title :
A DXCCII-based four-quadrant multiplier
Author :
Kumngern, Montree
Author_Institution :
Dept. of Telecommun. Eng., King Mongkut´s Inst. of Technol. Ladkrabang, Bangkok, Thailand
Abstract :
This paper presents a four-quadrant analog multiplier using dual-X second-generation current conveyors (DXCCIIs). The proposed multiplier employs only two DXCCIIs and eight MOS transistors operating in saturation region, which is ideal for monolithic implementation. The use of MOS devices operating in saturation region offers high-frequency capability of the circuit. PSPICE simulators using 0.35 μm TSMC CMOS process are used to validate the workability of the circuit. Simulation results show that the circuit has a -3dB bandwidth of 450 MHz, 1.59 % total harmonic distortion for the input current 200 mVP-P.
Keywords :
CMOS analogue integrated circuits; MOSFET; analogue multipliers; current conveyors; harmonic distortion; DXCCII; MOS devices; MOS transistors; PSPICE simulators; THD; TSMC CMOS process; bandwidth 450 MHz; dual-X second-generation current conveyors; four-quadrant analog multiplier; monolithic implementation; saturation region; size 0.35 mum; total harmonic distortion; voltage 200 mV; CMOS integrated circuits; Equations; MOSFET; Power engineering; Signal processing; Threshold voltage; analog multiplier; analog signal processing; dual-X second-generation current conveyor (DXCCII);
Conference_Titel :
Power Engineering and Optimization Conference (PEOCO), 2013 IEEE 7th International
Conference_Location :
Langkawi
Print_ISBN :
978-1-4673-5072-3
DOI :
10.1109/PEOCO.2013.6564644
