Concurrent reconfigurable architecture for mapping and encrypting a message in Elliptic Curve Cryptography

Elliptic Curve Cryptography (ECC) over a Galois Field GF(2^m) offers a high security level relative to other protocols (i.e., RSA) but with smaller keys´ sizes. In this paper, we consider the finite field multiplication and addition used in elliptic curve cryptography to design sequential, and then, concurrent reconfigurable ecrypto system to encrypt and decrypt a message. FPGA implementation via VHDL language has been completed to analyze the time and area required in both scenarios. Our approach, and for the first time, consider mapping a message on the elliptic curve concurrently.