A readout circuit with wide dynamic range for differential capacitive sensing applications

This paper presents a compact, low power, digitally assisted differential capacitive-sensing readout circuit. It utilizes digital design and switch-based synchronous demodulator to reduce area and power consumption while improving the robustness of the system by diminishing the effects of interfering signals. To broaden the sensing range of the system, the simple implementation of a closed-loop configuration is employed to dynamically adjust the gain. This circuit is designed, analyzed, and laid out in a standard 0.35 μm CMOS technology from Austria Microsystems. Post-layout simulation results reveal that the proposed circuit is capable of resolving a minimum of 1fF changes in input capacitance under test.