A current-reuse Class-C LC-VCO with an adaptive bias scheme

Author

Siriburanon, Teerachot ; Wei Deng ; Okada, Kenichi ; Matsuzawa, Akira

Author_Institution

Dept. of Phys. Electron., Tokyo Inst. of Technol., Tokyo, Japan

fYear

2013

fDate

2-4 June 2013

Firstpage

35

Lastpage

38

Abstract

This paper proposes a low-power currentreuse complementary differential LC-VCO which is composed of a pair of NMOS and PMOS transistors with an adaptive bias scheme for both transistors to ensure its robust startup and achieve maximum swing in Class-C operation. The proposed VCO has been implemented in a standard 0.18μm CMOS technology, which oscillates at the carrier frequency of 4.6 GHz. The measured phase noise is -139.5dBc/Hz at 10 MHz offset while drawing a current consumption of 1.6 mA from 1.5 V supply. The Figure of Merit is -189.1 dBc/Hz. To the author´s best knowledge, this is the first class-C current-reuse VCO with an adaptive bias scheme.

Keywords

CMOS integrated circuits; MMIC oscillators; MOSFET; field effect MMIC; phase noise; voltage-controlled oscillators; CMOS technology; MMIC oscillators; NMOS transistors; PMOS transistors; adaptive bias scheme; current 1.6 mA; frequency 4.6 GHz; low-power current reuse complementary differential LC-VCO; phase noise; size 0.18 mum; voltage 1.5 V; CMOS integrated circuits; Logic gates; MOSFET; Phase noise; Voltage-controlled oscillators; CMOS; Current-Reuse; LC-VCO; Phase noise; Start-up; feedback Class-C;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits Symposium (RFIC), 2013 IEEE

Conference_Location

Seattle, WA

ISSN

1529-2517

Print_ISBN

978-1-4673-6059-3

Type

conf

DOI

10.1109/RFIC.2013.6569515

Filename

6569515