An automatically placed-and-routed ADPLL for the medradio band using PWM to enhance DCO resolution

Author

Faisal, Mohammad ; Wentzloff, David D.

Author_Institution

Univ. of Michigan, Ann Arbor, MI, USA

fYear

2013

fDate

2-4 June 2013

Firstpage

115

Lastpage

118

Abstract

An all-digital phase-locked loop for the MedRadio bands is presented. This ring oscillator based ADPLL was entirely designed and placed-and-routed using digital design flows and was fabricated in a 65 nm CMOS process. Pulse width modulation of the DCO control signals is introduced as a technique to improve the resolution of the DCO to 59 kHz/LSB. This ADPLL operates as a subsampling integer-N frequency synthesizer from 400 to 460 MHz, and consumes 2.1 mA from a 1 V supply, with an rms jitter of 13.3 ps.

Keywords

CMOS logic circuits; digital phase locked loops; frequency synthesizers; oscillator strengths; oscillators; pulse width modulation; timing jitter; CMOS process; DCO resolution enhancement; MedRadio band; PWM; all-digital phase-locked loop; automatically placed-and-routed ADPLL; current 2.1 mA; digital design; digitally controlled oscillator; pulse width modulation; ring oscillator; rms jitter; size 65 nm; subsampling integer-N frequency synthesizer; time 13.3 ps; voltage 1 V; Adaptive filters; Delays; Frequency measurement; Phase locked loops; Pulse width modulation; Tuning; ADPLLs; DCOs; Phase-Locked Loops; Ring Oscillators; Synthesizable;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits Symposium (RFIC), 2013 IEEE

Conference_Location

Seattle, WA

ISSN

1529-2517

Print_ISBN

978-1-4673-6059-3

Type

conf

DOI

10.1109/RFIC.2013.6569537

Filename

6569537