Ultra-low voltage and low power UWB CMOS LNA using forward body biases

Author

Chih-Shiang Chang ; Jyh-Chyurn Guo

Author_Institution

Inst. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

fYear

2013

fDate

2-4 June 2013

Firstpage

173

Lastpage

176

Abstract

An ultra-wideband (UWB) low noise amplifier (LNA) was designed and fabricated using 0.18μm 1.8V CMOS technology. The adoption of forward body biases (FBB) in a 3-stage distributed amplifier enables an aggressive scaling of the supply voltages and gate input voltage to 0.6V. The low voltage feature from FBB leads to more than 50% power consumption saving to 4.2mW. The measured power gain (S21) is higher than 10dB in 3.1~8.1GHz and noise figure is 2.83~4.7 dB in the wideband of 2~10GHz. Superior linearity is achieved with IIP3 as high as 4.2dBm and 12.5dBm at 6.5GHz and 10GHz, respectively.

Keywords

CMOS analogue integrated circuits; distributed amplifiers; low noise amplifiers; low-power electronics; power consumption; ultra wideband communication; 3-stage distributed amplifier; CMOS technology; FBB; IIP3; aggressive scaling; forward body biases; frequency 10 GHz; frequency 6.5 GHz; gate input voltage; low power UWB CMOS LNA; power 4.2 mW; power consumption; power gain; size 0.18 mum; superior linearity; supply voltage; ultra-low voltage UWB CMOS LNA; ultra-wideband low noise amplifier; voltage 0.6 V; voltage 1.8 V; Bandwidth; CMOS integrated circuits; Gain; Impedance matching; Noise measurement; Power demand; Semiconductor device measurement; FBB; LNA; Low power; Low voltage; UWB; linearity; noise figure;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits Symposium (RFIC), 2013 IEEE

Conference_Location

Seattle, WA

ISSN

1529-2517

Print_ISBN

978-1-4673-6059-3

Type

conf

DOI

10.1109/RFIC.2013.6569553

Filename

6569553