DocumentCode :
625488
Title :
A T-DMB mobile TV SoC tuner with compact size, low power and BoM in 65nm CMOS
Author :
Jeonghoon Lee ; Shinil Chang ; Jaehwan Lee ; Jisun Ryu ; Kihyeok Ha ; Yongchang Choi ; Younghoon Kim ; Sanghyun Hwang ; Hongju Song ; Kiwon Choi ; Sangyoub Lee
Author_Institution :
I&C Technol. Inc., Seoul, South Korea
fYear :
2013
fDate :
2-4 June 2013
Firstpage :
451
Lastpage :
454
Abstract :
Summary form only given. This paper presents a direct conversion Korean standard T-DMB SoC tuner using a 65nm low power CMOS technology with the best feature of size, power and BoM ever reported. A digital F/E enhanced function is implemented to reduce analog signal processing empowered by oversampled A/D converter, digital channel selection filter and lots of digital calibration blocks. And the designed LNA excludes all required inductors. Thus high voltage gain and low current consumption are achieved due to their high Q factor. A single-to-differential signaling down-conversion mixer is also announced which has well balanced output characteristic. A DC/DC converter is adopted as well for the further low power consuming. The tunable clock frequency scheme of DC/DC buck converter can prevent a degradation of sensitivity performances which is planed value to escape the channel center frequency. This reported SoC tuner consumes only 28mA at maximum gain mode. And -103.5dBm of sensitivity and 48dBc of N±1 adjacent-channel selectivity are achieved also with only 5 external LC components. This SoC occupies 2.5×2.5mm2 die and WLCSP chip size.
Keywords :
CMOS analogue integrated circuits; DC-DC power convertors; Q-factor; analogue-digital conversion; clocks; digital filters; digital multimedia broadcasting; low noise amplifiers; low-power electronics; mixers (circuits); mobile television; power consumption; system-on-chip; tuning; BoM; DC/DC buck converter; LC component; LNA; Q factor; T-DMB SoC tuner; T-DMB mobile TV SoC tuner; WLCSP chip size; adjacent-channel selectivity; analog signal processing; balanced output characteristic; channel center frequency; compact size; current 28 mA; current consumption; digital F/E enhanced function; digital calibration block; digital channel selection filter; direct conversion Korean standard; gain mode; low power CMOS technology; oversampled A/D converter; power consumption; sensitivity performance; single-to-differential signaling down-conversion mixer; size 65 nm; tunable clock frequency scheme; voltage gain; Bills of materials; Clocks; Mixers; Radio frequency; Sensitivity; System-on-chip; Tuners; ACS; DC/DC buck converter; Digital F/E; IM3 canceling LNA; LDO; Mobile TV; Sensitivity; Single-to-differential conversion mixer; T-DMB; Tuner;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio Frequency Integrated Circuits Symposium (RFIC), 2013 IEEE
Conference_Location :
Seattle, WA
ISSN :
1529-2517
Print_ISBN :
978-1-4673-6059-3
Type :
conf
DOI :
10.1109/RFIC.2013.6569628
Filename :
6569628
Link To Document :
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