DocumentCode :
625588
Title :
P-sync: A Photonically Enabled Architecture for Efficient Non-local Data Access
Author :
Whelihan, David ; Hughes, J.J. ; Sawyer, Scott M. ; Robinson, Emma ; Wolf, Michael ; Mohindra, Sanjeev ; Mullen, Jon ; Klein, Andreas ; Beard, Michael ; Bliss, N.T. ; Chan, Jeffrey ; Hendry, Robert ; Bergman, Keren ; Carloni, Luca P.
Author_Institution :
Massachusetts Inst. of Technol. Lincoln Lab., Lexington, MA, USA
fYear :
2013
fDate :
20-24 May 2013
Firstpage :
189
Lastpage :
200
Abstract :
Communication in multi- and many-core processors has long been a bottleneck to performance due to the high cost of long-distance electrical transmission. This difficulty has been partially remedied by architectural constructs such as caches and novel interconnect topologies, albeit at a steep cost in terms of complexity. Unfortunately, even these measures are rendered ineffective by certain kinds of communication, most notably scatter and gather operations that exhibit highly nonlocal data access patterns. Much work has gone into examining how the increased bandwidth density afforded by chip-scale silicon photonic interconnect technologies affects computing, but photonics have additional properties that can be leveraged to greatly accelerate performance and energy efficiency under such difficult loads. This paper describes a novel synchronized global photonic bus and system architecture called P-sync that uses photonics´ distance independence to greatly improve performance on many important applications previously limited by electronic interconnect. The architecture is evaluated in the context of a non-local yet common application: the distributed Fast Fourier Transform. We show that it is possible to achieve high efficiency by tightly balancing computation and communication latency in P-sync and achieve upwards of a 6× performance increase on gather patterns, even when bandwidth is equalized.
Keywords :
computer architecture; fast Fourier transforms; multiprocessing systems; multiprocessor interconnection networks; network topology; optical computing; optical interconnections; power aware computing; synchronisation; P-sync; bandwidth density improvement; bandwidth equalization; caches; chip-scale silicon photonic interconnect technologies; communication latency; computation latency; distributed Fast Fourier Transform; energy efficiency improvement; long-distance electrical transmission cost; manycore processor communication; multiprocessor communication; nonlocal data access; performance improvement; photonic distance independence; photonically enabled system architecture; steep cost; synchronized global photonic bus; Clocks; Computer architecture; Modulation; Optical waveguides; Photonics; Program processors; Synchronization; computer architecture; network on chip; silicon photonics;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel & Distributed Processing (IPDPS), 2013 IEEE 27th International Symposium on
Conference_Location :
Boston, MA
ISSN :
1530-2075
Print_ISBN :
978-1-4673-6066-1
Type :
conf
DOI :
10.1109/IPDPS.2013.56
Filename :
6569811
Link To Document :
بازگشت