DocumentCode
626485
Title
A spur cancellation technique for MDLL-based frequency synthesizers
Author
Marzin, Giovanni ; Fenaroli, Andrea ; Marucci, Giovanni ; Levantino, Salvatore ; Samori, Carlo ; Lacaita, Andrea L.
Author_Institution
Dipt. di Elettron. e Inf., Politec. di Milano, Milan, Italy
fYear
2013
fDate
19-23 May 2013
Firstpage
165
Lastpage
168
Abstract
This paper introduces a technique for suppressing the effect of deterministic jitter in phase-locked loops based on multiplying delay-locked loops. A digital loop operating in background of normal operation detects the static phase offset between the two reference-signal paths by means of a single-bit time-to-digital converter and compensates for it by means of a digital-to-time converter.
Keywords
delay lock loops; frequency synthesizers; jitter; phase locked loops; time-digital conversion; MDLL-based frequency synthesizers; deterministic jitter effect suppression; digital loop; digital-to-time converter; multiplying delay-locked loops; phase-locked loops; reference-signal paths; single-bit time-to-digital converter; spur cancellation technique; static phase offset; Clocks; Delays; Jitter; Noise; Oscillators; Phase locked loops; Power demand;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2013 IEEE International Symposium on
Conference_Location
Beijing
ISSN
0271-4302
Print_ISBN
978-1-4673-5760-9
Type
conf
DOI
10.1109/ISCAS.2013.6571808
Filename
6571808
Link To Document