A SC/HSI dual-mode baseband receiver with frequency-domain equalizer for IEEE 802.15.3c

Author

Wei-Chang Liu ; Fu-Chun Yeh ; Ting-Chen Wei ; Ya-Shiue Huang ; Tai-Yang Liu ; Shen-Jui Huang ; Ching-Da Chan ; Shyh-Jye Jou ; Sau-Gee Chen

Author_Institution

Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

fYear

2013

fDate

19-23 May 2013

Firstpage

793

Lastpage

796

Abstract

In this paper, an 8X-parallelism digital baseband receiver is proposed for IEEE 802.15.3c application. The baseband receiver consists of all-digital synchronization, radix-16 FFT and LS-LMS equalizer modules. It supports SC and HSI dual-mode in IEEE 802.15.3c with single hardware for area efficiency. The chip is implemented with 65 nm 1P9M process. The fabricated area is 12.96 mm² with 3463 K gate counts. The post-layout verification shows the throughput rate under QPSK modulation achieves 3.52 Gb/s and 5.28 Gb/s for SC mode (220 MHz) and HSI mode (330 MHz), respectively.

Keywords

digital arithmetic; equalisers; personal area networks; radio receivers; synchronisation; telecommunication standards; 1P9M process; 8X-parallelism digital baseband receiver; IEEE 802.15.3c application; LS-LMS equalizer modules; QPSK modulation; SC/HSI dual-mode baseband receiver; all-digital synchronization; area efficiency; frequency-domain equalizer; post-layout verification; radix-16 FFT; size 65 nm; throughput rate; Baseband; Hardware; IEEE 802.15 Standards; Phase shift keying; Receivers; Synchronization;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (ISCAS), 2013 IEEE International Symposium on

Conference_Location

Beijing

ISSN

0271-4302

Print_ISBN

978-1-4673-5760-9

Type

conf

DOI

10.1109/ISCAS.2013.6571966

Filename

6571966