A multi-stage and time-based continuous time ΣΔ Architecture using a Gated Ring Oscillator

We present a multi-stage noise shaping modulator that uses a continuous time first stage and a Gated Ring Oscillator (GRO)as second stage. A Pulse Width Modulator (PWM) and a Time-to-Digital converter (TDC) is used as time-based quantizer in first stage. The binary output of the PWM is reused to control the GRO, avoiding the distortion that would be introduced by a conventional VCO. The digital outputs of both stages are filtered out to remove first stage quantization noise as in any conventional multi-stage Sigma-Delta Architecture. The architecture is suitable to extend the bandwidth or the resolution of a low oversampling time-based Continuous Time Sigma-Delta Modulators (CTIAM) with a small amount of analog circuitry and low power consumption. A simulation example using a 2-1 architecture, 50MHz bandwidth and 2GHZ clock is presented, showing 76dB SNDR at system level.