Title :
A transformer neutralization based 60GHz LNA in 65 nm LP CMOS with 22dB gain and 5.5dB NF
Author :
Aili Wang ; Lianming Li ; Tiejun Cui
Author_Institution :
Sch. of Inf. Sci. & Eng., Southeast Univ., Nanjing, China
Abstract :
A three-stage common-source low noise amplifier (LNA) is designed in a 65 nm LP CMOS process. Basically, at mm-wave frequency the Miller capacitance degrades the amplifier performance dramatically. To address these issues, a transformer based neutralization technique is used. With the proposed technique, simulations show that the circuit achieves a gain of 22 dB along with a 1-dB bandwidth of 4 GHz. The noise figure is 5.5 dB and the IIP3 is -10.7 dBm with a power consumption of 26 mW from a 1.2 V supply.
Keywords :
CMOS analogue integrated circuits; field effect MIMIC; low noise amplifiers; transformers; LNA; LP CMOS process; Miller capacitance; bandwidth 4 GHz; frequency 60 GHz; gain 22 dB; mm-wave frequency; noise figure 5.5 dB; power 26 mW; size 65 nm; three-stage common-source low noise amplifier; transformer neutralization technique; voltage 1.2 V; CMOS integrated circuits; Capacitance; Gain; Noise; Noise measurement; Radiofrequency integrated circuits; Transistors;
Conference_Titel :
Circuits and Systems (ISCAS), 2013 IEEE International Symposium on
Conference_Location :
Beijing
Print_ISBN :
978-1-4673-5760-9
DOI :
10.1109/ISCAS.2013.6572045
