DocumentCode
626755
Title
Improved characterization of high speed continuous-time ΔΣ modulators using a duobinary test interface
Author
Jain, Abhishek ; Pavan, Shanthi
Author_Institution
Indian Inst. of Technol., Madras, Chennai, India
fYear
2013
fDate
19-23 May 2013
Firstpage
1252
Lastpage
1255
Abstract
Characterizing wide band continuous-time ΔΣ modulators is a challenge due to the high data rate at the output of the modulator. We propose the use of a duobinary test interface to extend the frequency range over which reliable laboratory measurements become possible. We show that using such an interface effectively randomizes the modulator output data and reduces high frequency content, thereby reducing the bandwidth demands made on the test equipment. Experimental results from a single-bit CTDSM operating at 4.4 GHz are given, demonstrating the efficacy of the technique.
Keywords
sigma-delta modulation; duobinary test interface; frequency 4.4 GHz; high frequency content reduction; high speed continuous-time ΔΣ modulators; laboratory measurements; single-bit CTDSM; Bandwidth; Clocks; Encoding; Frequency measurement; Frequency modulation; Oscilloscopes;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2013 IEEE International Symposium on
Conference_Location
Beijing
ISSN
0271-4302
Print_ISBN
978-1-4673-5760-9
Type
conf
DOI
10.1109/ISCAS.2013.6572080
Filename
6572080
Link To Document