• DocumentCode
    626759
  • Title

    Analysis and design of high speed/high linearity continuous time delta-sigma modulator

  • Author

    Chao Chu ; Bruckner, Thomas ; Kauffman, John G. ; Anders, Jens ; Becker, Jurgen ; Ortmanns, Maurits

  • Author_Institution
    Inst. of Microelectron., Univ. of Ulm, Ulm, Germany
  • fYear
    2013
  • fDate
    19-23 May 2013
  • Firstpage
    1268
  • Lastpage
    1271
  • Abstract
    This paper considers the implementation of a continuous-time low-pass single-bit ΔΣ analog-digital converter (ADC) for radar applications. By taking advantage of the high transit frequency of a 0.25μm SiGe BiCMOS technology, the 3rd-order modulator operates at 1.92GHz and achieves 77.8dB SNDR within a bandwidth of 15MHz, when simulating the sensitive circuit parts on transistor level. Thanks to the inherent linearity of single-bit digital-analog converter (DAC), high linearity of 90dB spurious-free dynamic range (SFDR) can be achieved.
  • Keywords
    BiCMOS digital integrated circuits; Ge-Si alloys; UHF integrated circuits; analogue-digital conversion; delta-sigma modulation; 3rd-order modulator; ADC; BiCMOS technology; SFDR; SNDR; SiGe; bandwidth 15 MHz; continuous-time low-pass single-bit ΔΣ analog-digital converter; frequency 1.92 GHz; high speed-high linearity continuous time delta-sigma modulator; single-bit DAC; single-bit digital-analog converter; size 0.25 mum; spurious-free dynamic range; transistor level; Bandwidth; Frequency modulation; Linearity; Noise; Quantization (signal); Silicon germanium;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (ISCAS), 2013 IEEE International Symposium on
  • Conference_Location
    Beijing
  • ISSN
    0271-4302
  • Print_ISBN
    978-1-4673-5760-9
  • Type

    conf

  • DOI
    10.1109/ISCAS.2013.6572084
  • Filename
    6572084