• DocumentCode
    626867
  • Title

    A LUT-free DC offset calibration method for removing the PGA-gain-correlated offset residue

  • Author

    Lingwei Zhang ; Hanjun Jiang ; Fule Li ; Jingjing Dong ; Zhihua Wang

  • Author_Institution
    Tsinghua Nat. Lab. for Inf. Sci. & Technol., Tsinghua Univ., Beijing, China
  • fYear
    2013
  • fDate
    19-23 May 2013
  • Firstpage
    1704
  • Lastpage
    1707
  • Abstract
    This paper presents a novel DC offset calibration method for the zero-IF (intermediate frequency) receiver that removes the PGA-gain-correlated offset residue. The conventional calibration method is usually based on the classic input/output referred offset model, in which the receiver IF programmable gain amplifiers (PGAs) have offset sources that varies a lot with different gain settings. Consequently, the conventional calibration method needs to generate the calibration code at each gain step and requires a huge look up table (LUT) to store the calibration values. This paper presents a new DC offset model which is gain non-correlated, by analyzing two types of commonly-used PGA. Based on the new model, a LUT-free single-step DC offset calibration method in together with the implementation circuit is designed. The proposed method has been verified on a practical zero-IF receiver circuit in a standard 0.18 μm CMOS technology through the Monte Carlo (MC) simulation. The simulation results show that the receiver IF output offset residue after calibration using the proposed method is reduced to below 12 mV, which is comparable to the LUT-based conventional calibration.
  • Keywords
    CMOS analogue integrated circuits; Monte Carlo methods; amplifiers; calibration; CMOS technology; LUT-free single-step DC offset calibration method; MC simulation; Monte Carlo simulation; PGA-gain-correlated offset residue; classic input-output referred offset model; look up table; programmable gain amplifiers; size 0.18 mum; zero-IF receiver circuit; Calibration; Electronics packaging; Gain; Integrated circuit modeling; Mathematical model; Receivers; Resistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (ISCAS), 2013 IEEE International Symposium on
  • Conference_Location
    Beijing
  • ISSN
    0271-4302
  • Print_ISBN
    978-1-4673-5760-9
  • Type

    conf

  • DOI
    10.1109/ISCAS.2013.6572192
  • Filename
    6572192