A reconfigurable architecture for real-time prediction of neural activity

Author

Li, Will X. Y. ; Cheung, Ray C. C. ; Chan, Rosa H. M. ; Dong Song ; Berger, Theodore W.

Author_Institution

Dept. of Electr. Eng., City Univ. of Hong Kong, Hong Kong, China

fYear

2013

fDate

19-23 May 2013

Firstpage

1869

Lastpage

1872

Abstract

In this paper, we propose an FPGA-based hardware architecture for conducting real-time prediction of neural activity using a second-order generalized Laguerre-Volterra model (GLVM). This architecture serves as a rapid prototype of the prediction module of the future cognitive neural prosthetic device. We validate the functionality of the hardware model by utilizing the neuronal firing data of behaving rats trained to perform the delayed nonmatch-to-sample (DNMS) memory task.

Keywords

bioelectric phenomena; cognition; field programmable gate arrays; neural nets; neurophysiology; prosthetics; real-time systems; DNMS; FPGA-based hardware architecture; GLVM; cognitive neural prosthetic device; delayed nonmatch-to-sample memory task; hardware model; neural activity; neuronal firing data; prediction module; rapid prototype; real-time prediction; reconfigurable architecture; second-order generalized Laguerre-Volterra model; Computer architecture; Convolution; Field programmable gate arrays; Hardware; Kernel; Prosthetics; Vectors;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (ISCAS), 2013 IEEE International Symposium on

Conference_Location

Beijing

ISSN

0271-4302

Print_ISBN

978-1-4673-5760-9

Type

conf

DOI

10.1109/ISCAS.2013.6572230

Filename

6572230