Title :
A VLSI DBSCAN processor composed as an array of micro agents having self-growing interconnects
Author :
Shimada, Akira ; Hongbo Zhu ; Shibata, Takuma
Author_Institution :
Dept. of Electr. Eng. & Inf. Syst., Univ. of Tokyo, Tokyo, Japan
Abstract :
A DBSCAN (Density Based Spatial Clustering of Applications with Noise) processor has been developed. The original DBSCAN algorithm has been divided into two parts: the self-growing process and the labeling process for efficient VLSI hardware implementation. An array of micro agents having self-growing interconnects has been developed to achieve full pixel-parallel processing for self-growing as well as for labeling by single clock-cycle connection. A proof-of-concept chip was designed in a 0.18-μm CMOS technology. From the simulation results, a frame rate of 12K fps is demonstrated even for the worst case processing of an image of 80 × 80 pixels at an operating frequency of 100 MHz.
Keywords :
CMOS digital integrated circuits; VLSI; image processing; interconnections; multiprocessing systems; parallel architectures; pattern clustering; CMOS technology; VLSI DBSCAN processor; VLSI hardware implementation; density based spatial clustering of applications with noise processor; full pixel-parallel processing; labeling process; microagents array; operating frequency; proof-of-concept chip; self-growing interconnects; self-growing process; single clock-cycle connection; size 0.18 mum; worst case processing; Algorithm design and analysis; Arrays; Clocks; Clustering algorithms; Labeling; Very large scale integration;
Conference_Titel :
Circuits and Systems (ISCAS), 2013 IEEE International Symposium on
Conference_Location :
Beijing
Print_ISBN :
978-1-4673-5760-9
DOI :
10.1109/ISCAS.2013.6572278