DocumentCode
626981
Title
Analysis of back-end flash in a 1.5b/stage pipelined ADC
Author
Gande, Manideep ; Guerber, Jon ; Un-Ku Moon
Author_Institution
Sch. of EECS, Oregon State Univ., Corvallis, OR, USA
fYear
2013
fDate
19-23 May 2013
Firstpage
2247
Lastpage
2250
Abstract
An analysis of the impact of last stage flash in a conventional pipeline ADC is performed in this paper. The performance of a pipeline ADC can be altered significantly by calibrating the comparators in the back-end flash. Also, realizing that the input to the back-end flash (in a pipeline ADC) is not uniformly distributed, this paper proposes alternative back-end flash references to improve the overall performance of the ADC. An analysis of the performance of the pipeline with large offsets in the MDAC stages is also presented in this paper.
Keywords
analogue-digital conversion; comparators (circuits); MDAC stage; back-end flash analysis; back-end flash references; comparators; conventional pipeline ADC; stage flash; Ash; Histograms; Pipelines; Quantization (signal); Redundancy; Signal to noise ratio; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2013 IEEE International Symposium on
Conference_Location
Beijing
ISSN
0271-4302
Print_ISBN
978-1-4673-5760-9
Type
conf
DOI
10.1109/ISCAS.2013.6572324
Filename
6572324
Link To Document