DocumentCode
627023
Title
An FPGA-based point target detection system using morphological clutter elimination
Author
Chun-Hsian Huang
Author_Institution
Dept. of Comput. Sci. & Inf. Eng., Nat. Taitung Univ., Taitung, Taiwan
fYear
2013
fDate
19-23 May 2013
Firstpage
2436
Lastpage
2439
Abstract
In this work, we propose a point target detection system (PTDS) based on the FPGA technology. Instead of adopting the traditional filter-based methods, in the PTDS, we design a pipelined morphological clutter elimination (PMCE) hardware design with the ability of pipeline and parallel computing. Using the PMCE hardware design, the infrared images can be processed in real-time, which thus enhances system performance significantly. To provide seamless data transfers between the PMCE hardware design and the microprocessor, a hardware/software interface component is also designed in the PTDS. Experiments with an application of point target detection for processing realtime 320 × 240 pixel infrared images demonstrate that the PTDS can speed up 18 times the execution time required by using the software method.
Keywords
clutter; field programmable gate arrays; infrared imaging; microprocessor chips; object detection; FPGA technology; FPGA-based point target detection system; PMCE hardware design; PTDS; hardware-software interface component; infrared images; microprocessor; parallel computing; pipeline computing; pipelined morphological clutter elimination; seamless data transfers; software method; traditional filter-based method; Buffer storage; Clutter; Hardware; Microprocessors; Object detection; Real-time systems; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2013 IEEE International Symposium on
Conference_Location
Beijing
ISSN
0271-4302
Print_ISBN
978-1-4673-5760-9
Type
conf
DOI
10.1109/ISCAS.2013.6572371
Filename
6572371
Link To Document