A time-interleaved ADC architecture exploiting correlations between samples

This paper introduces a time-interleaved (TI) analog-to-digital converter architecture that exploits the correlation between consecutive samples. Two predictive algorithms, i.e. the last sample prediction and linear extrapolation prediction, have been investigated. Simulation results show that for a filtered random or modulated sequence sampled at an oversampling ratio of 4, both algorithms perform well. The performance degrades in the presence of out-of-band signals, but only if the input signal amplitude is greater than 2/3 of the ADC full scale. The performance degradation is quantified as a deviation of the output from the ideal in LSB´s. Linear extrapolation algorithm has a higher probability of such degradation compared to last sample prediction. The new architecture requires only a subset of comparators to be enabled in the first stage of a two-step flash based design, which can be expected to reduce power consumption.