Velocity saturation current-mode CMOS imaging sensor

A current-mode CMOS imaging sensor is presented in this paper. The read-out transistor in the photo pixel operates in velocity saturation regime and allows for high linearity between integrated photo charges and output drain current. The column parallel read-out circuitry implements a novel current conveyor with a feedback mechanism which improves matching of the output currents across the imaging array. Correlated double sampling (CDS) is performed on-chip in order to improve noise characteristics of the imager. A prototype of the proposed imaging sensor was fabricated in 0.18μm triple well CMOS process. The sensor operation and measurements are presented.