Title :
Precision timed infrastructure: Design challenges
Author :
Broman, David ; Zimmer, Michael ; Yooseong Kim ; Hokeun Kim ; Jian Cai ; Shrivastava, Ashish ; Edwards, Stephen A. ; Lee, Edward A.
Author_Institution :
Univ. of California, Berkeley, Berkeley, CA, USA
fDate :
May 31 2013-June 1 2013
Abstract :
In general-purpose software applications, computation time is just a quality factor: faster is better. In cyber-physical systems (CPS), however, computation time is a correctness factor: missed deadlines for hard real-time applications, such as avionics and automobiles, can result in devastating, life-threatening consequences. Although many modern modeling languages for CPS include the notion of time, implementation languages such as C lack any temporal semantics. Consequently, models and programs for CPS are neither portable nor guaranteed to execute correctly on the real system; timing is merely a side effect of the realization of a software system on a specific hardware platform. In this position paper, we present the research initiative for a precision timed (PRET) infrastructure, consisting of languages, compilers, and microarchitectures, where timing is a correctness factor. In particular, the timing semantics in models and programs must be preserved during compilation to ensure that the behavior of real systems complies with models. We also outline new research and design challenges present in such an infrastructure.
Keywords :
precision engineering; timing circuits; computation time; correctness factor; cyber-physical systems; general-purpose software applications; precision timed infrastructure; Computational modeling; Computer architecture; Hardware; Microarchitecture; Program processors; Timing;
Conference_Titel :
Electronic System Level Synthesis Conference (ESLsyn), 2013
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4673-6414-0