DocumentCode :
627745
Title :
Synchronous full-adder based on complementary resistive switching memory cells
Author :
Zhang, Ye ; Deng, E.Y. ; Klein, J.O. ; Querlioz, Damien ; Ravelosona, Dafine ; Chappert, Claude ; Zhao, Weisheng S. ; Moreau, M. ; Portal, J.M. ; Bocquet, Michael ; Aziza, H. ; Deleruyelle, D. ; Muller, Candice
Author_Institution :
IEF, Univ. Paris-Sud, Orsay, France
fYear :
2013
fDate :
16-19 June 2013
Firstpage :
1
Lastpage :
4
Abstract :
Emerging non-volatile memories (NVM) such as STT-MRAM and OxRRAM are under intense investigation by both academia and industries. They are based on resistive switching mechanisms and promise advantageous performances in terms of access speed, power consumption and endurance (i.e. >1012), surpassing mainstream flash memories. This paper presents a non-volatile full-adder design based on complementary resistive switching memory cells and validates it through two NVM technologies: STT-MRAM and OxRRAM on 40 nm node. This architecture allows low power consumption. Thanks to the nonvolatility and 3D integration of NVM, both standby power during “idle” state and data transfer power can be reduced. Using a low changing frequency can also control the switching power of NVM. The complementary cells and parallel data sensing enable fast computation and high reliability.
Keywords :
adders; logic design; random-access storage; NVM; OxRRAM; STT-MRAM; access speed; complementary resistive switching memory cell; nonvolatile full-adder design; nonvolatile memories; parallel data sensing; power consumption; synchronous full-adder; CMOS integrated circuits; Computer architecture; Magnetic tunneling; Nonvolatile memory; Resistance; Switches; Transient analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
New Circuits and Systems Conference (NEWCAS), 2013 IEEE 11th International
Conference_Location :
Paris
Print_ISBN :
978-1-4799-0618-5
Type :
conf
DOI :
10.1109/NEWCAS.2013.6573578
Filename :
6573578
Link To Document :
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