A 12-bit interpolated pipeline ADC using body voltage controlled amplifier

This paper presents a 12-bit interpolated pipeline analog to digital converter (ADC) using body voltage controlled amplifier for current biasing and common mode feedback loop (CMFB). The proposed body voltage control method allows the amplifier to achieve small power consumption and large output swing. The proposed amplifier has a power consumption lower than 15.6 mW, almost half of the folded cascode (FC) amplifier satisfying 12-bit, 400 MS/s ADC operation. Moreover, the proposed amplifier secures 600 mV output swing, which is 1-V_DS wider compared with the telescopic amplifier. The 12-bit interpolated pipeline ADC using proposed amplifier is demonstrated by 1P9M 90 nm process with 1.2 V supply voltage. The ADC achieves ENOB of about 10-bit at 300 MS/s and an FoM of 0.2 pJ/conv. when the frequency of the input signal is sufficiently low.