An improved compact model of the electrical behaviour of the 5-contact vertical hall-effect device

The goal of this work is the improvement of an existing design-oriented model of the 5-contact vertical Hall-effect sensor integrated in CMOS technology. Such a model should facilitate the work of designers, permitting them to simulate the sensor, the biasing and processing electronics together with the same electrical simulator. In this paper, focus is put on two physical effects that alter the electrical behavior of the sensor: the carrier velocity saturation under high electric field, and the limitation of the current lines depth into a deep sensor. The model has been achieved with a subtle mix of theoretical considerations, numerical simulations performed with COMSOL Multiphysics^®. and experimental data. It has been compared with experimental data gathered from two devices, one fabricated in a low-voltage (LV) standard technology and another one in a high-voltage (HV) technology. Simulations obtained with the compact model fit the actual behavior of the LV-sensor with a root mean square error of 0.35%, and 0.8% for the HV-VHD.