DocumentCode
627830
Title
A methodology for system-level fault injection based on gate-level faulty behavior
Author
Robache, R. ; Boland, J.-F. ; Thibeault, Claude ; Savaria, Yvon
Author_Institution
Electr. Eng. Dept., Ecole de Technol. Super., Montréal, QC, Canada
fYear
2013
fDate
16-19 June 2013
Firstpage
1
Lastpage
4
Abstract
In this paper a methodology for creating a high-level faulty models library for simulating low-level fault injection is proposed. The concept of faulty behavior Signature is first proposed in this work. This paper demonstrates how faulty behavior Signatures allow building high level models, for example using Simulink, that reflect with high fidelity the faulty behavior of a combinational circuit represented at gate-level injected with one fault arbitrarily selected from a fault list. It is shown that we are able to capture this behavior with a correlation coefficient of 99.93%.
Keywords
combinational circuits; fault diagnosis; logic testing; combinational circuit; gate-level faulty behavior; high-level faulty model library; low-level fault injection; system-level fault injection; Aerospace electronics; Circuit faults; Integrated circuit modeling; Logic gates; Object oriented modeling; Software packages; Vectors;
fLanguage
English
Publisher
ieee
Conference_Titel
New Circuits and Systems Conference (NEWCAS), 2013 IEEE 11th International
Conference_Location
Paris
Print_ISBN
978-1-4799-0618-5
Type
conf
DOI
10.1109/NEWCAS.2013.6573663
Filename
6573663
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