A novel dynamic element matching technique suited for high pass ΔΣ ADCs

Author

Jabbour, Chadi ; Fakhoury, Hussein ; Van Tam Nguyen ; Loumeau, Patrick

fYear

2013

fDate

16-19 June 2013

Firstpage

1

Lastpage

4

Abstract

This paper presents a novel dynamic element matching technique (DEM) suited for high pass (HP) Delta Sigma (ΔΣ) modulators. It is based on transforming the high pass filtering behavior of classical DEM algorithms into a low pass behavior to make them adapted for HP ΔΣ modulators. The proposed technique is demonstrated for the data weight averaging (DWA) algorithm at the system level and the electrical level using a 65 nm CMOS process. The achieved performances in terms of SFDR and SNDR are similar to the performances of classical low pass (LP) ΔΣ modulators employing regular DWA. Moreover the required additional complexity is very low : just 8 simple switches and some digital gates.

Keywords

CMOS integrated circuits; delta-sigma modulation; high-pass filters; modulators; ΔΣ ADC; CMOS; SFDR; SNDR; data weight averaging algorithm; dynamic element matching technique; high pass Delta Sigma modulators; high pass filtering; low pass ΔΣ modulators; size 65 nm; Capacitors; Circuits and systems; Harmonic analysis; Modulation; Noise; Power demand; Sigma-delta modulation; Analog to Digital Converter; DEM; DWA; Delta Sigma; high pass;

fLanguage

English

Publisher

ieee

Conference_Titel

New Circuits and Systems Conference (NEWCAS), 2013 IEEE 11th International

Conference_Location

Paris

Print_ISBN

978-1-4799-0618-5

Type

conf

DOI

10.1109/NEWCAS.2013.6573674

Filename

6573674