Power delivery modeling for 3D systems with non-uniform TSV distribution

This paper reports on power delivery modeling for 3D systems where through-silicon vias (TSVs) are not uniformly distributed, but are arranged at the peripheries of circuit blocks and die edges. The voltage drop (IR) and di/dt noise on the power delivery are modeled and compared with those given by uniformly distributed TSVs. The impact of TSV density and circuit block size, and their tradeoffs are evaluated.