• DocumentCode
    628528
  • Title

    High throughput Cu-Cu bonding by non-thermo-compression method

  • Author

    Chuan Seng Tan ; Gang Yih Chong

  • Author_Institution
    Nanyang Technol. Univ., Singapore, Singapore
  • fYear
    2013
  • fDate
    28-31 May 2013
  • Firstpage
    1158
  • Lastpage
    1164
  • Abstract
    A non-thermo-compression bonding method by ways of a permanent surface passivation is applied and activated to allow instantaneous Cu-Cu bonding in room ambient hence improving the throughput by at least 30×. This permanent surface finish layer is ultra-thin, CMOS compatible, electrically conductive, resistant to oxidation, does not intermix with Cu, and can be activated readily to achieve fusion bonding (hence not diffusion limited). In this work, clean bump-less Cu surface (100 nm) is coated with a thin passivation layer of 10 nm and protected against ambient oxidation or corrosion. Prior to bonding, the surface is cleaned and activated to achieve a hydrophilic surface with contact angle ~ 10° and RMS roughness of 0.35 nm. A pair of wafers is then brought into intimate contact and bonding is achieved instantaneously via surface energy interaction in clean room ambient. Since the melting temperature of the passivation layer is much higher than the back-end temperature, it is possible to enhance the bond strength further by post-bonding annealing in a batch process. Experimental data show that the mechanical and electrical performance of the Cu-Cu bond is not deteriorated with the application of the permanent passivation layer. The insertion of the thin coating results in a slight increase in sheet resistance from 0.16 ohm/sq (Cu/Cu) to 0.18 ohm/sq (Cu/passivation layer/Cu). I-V measurement across the bonding interface of the non-TCB sample does not reveal clear departure from that of the TCB sample. Four point bending test is performed and the adhesion energy is 14 mJ/m2 (non-TCB) as compared with 12 mJ/m2 for TCB Cu-Cu. The bonding interface is seamless with no void as observed under TEM. This is a major improvement in throughput as compared to thermo-compression bonding as the bonding step is completed in several seconds upon contact without the need for prolonged compression and heating. In addition, bonding is performed in- room ambient (25 °C, 1 ATM) with existing tool set. The need of inert bonding chamber is optional. Room temperature bonding is essential to avoid thermal run-out in alignment accuracy as well as better post-bonding thermo-mechanical stress control. Since this non-TCB bonding method is accomplished instantaneously upon contact initialization, it is possible to extend this method to die-on-wafer bonding with reasonable throughput. Die-on-wafer bonding offers greater flexibility in heterogeneous 3D IC stacking with different die size which is not possible by wafer-on-wafer bonding.
  • Keywords
    CMOS integrated circuits; adhesive bonding; coating techniques; contact angle; copper; electric resistance; integrated circuit testing; mean square error methods; melting; oxidation; passivation; three-dimensional integrated circuits; wafer bonding; CMOS compatible; Cu-Cu; I-V measurement; RMS roughness; TEM; adhesion energy; ambient oxidation; back-end temperature; batch process; bond strength; bonding chamber; bonding interface; bump-less Cu surface coating; contact angle; contact initialization; die size; die-on-wafer bonding; electrical conductivity; electrical performance; four point bending test; fusion bonding; heterogeneous 3D IC stacking; high throughput bonding; hydrophilic surface; mechanical performance; melting temperature; nonTCB bonding method; nonthermo-compression bonding method; permanent surface finish layer; permanent surface passivation; post-bonding annealing; room ambient; sheet resistance; size 0.35 nm; size 10 nm; surface bonding; surface energy interaction; temperature 25 C; temperature 293 K to 298 K; thin coating; thin passivation layer; tool set; ultra-thin layer; wafer-on-wafer bonding; Bonding; Coatings; Films; Integrated circuits; Plasmas; Rough surfaces; Surface treatment;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference (ECTC), 2013 IEEE 63rd
  • Conference_Location
    Las Vegas, NV
  • ISSN
    0569-5503
  • Print_ISBN
    978-1-4799-0233-0
  • Type

    conf

  • DOI
    10.1109/ECTC.2013.6575720
  • Filename
    6575720