DocumentCode :
628552
Title :
Dielectric composite material with good performance and process ability for embedding of active and passive components into PCBs
Author :
Park, Rae-Hong ; Seunghyun Cho ; Kress, Jurgen ; Galster, Norbert
Author_Institution :
Atotech Germany GmbH, Basel, Switzerland
fYear :
2013
fDate :
28-31 May 2013
Firstpage :
1325
Lastpage :
1331
Abstract :
The advantages of the technology of embedding actives and passives led to numerous R&D activities in recent years. Improved reliability [1], better heat management [6], the potential for further miniaturization, and the improved electrical performance by direct contacting the chips through micro vias [2] are some of the main drivers for a rapidly increasing interest in this still emerging technology. A DC-DC converter as described in [3] is a recent example of a successful commercialization. Besides the optimization of the different processes for high yield and low cost of the dielectric materials used for the component encapsulation are subjects of concern. This paper first discusses different types of dielectric materials suitable for chip embedding and their related technical challenges. A dielectric composite build-up material consisting of a copper foil with a highly b-staged reinforced layer and a resin only layer on top of it was described in previous papers already [13], [14]. This type of composite material shows some distinct technical advantages which will be discussed in the following. Its two layer resin structure can help to overcome practical problems of embedding technology due to its applicability for a wide range of component designs and its good thickness distribution and leveling characteristics. The described approach also allows the use of dielectric resins with different individual property profiles for each of the two layers opening up a multitude of possibilities to tune the characteristics of the PCB according to its particular design and layout. In order to efficiently identify the required material properties for an optimized process yield and for good reliability, a simulation study was deployed.
Keywords :
DC-DC power convertors; active networks; circuit optimisation; composite materials; dielectric materials; integrated circuit reliability; integrated circuit yield; passive networks; printed circuit design; resins; DC-DC converter; PCB; R&D activities; active component; b-staged reinforced layer; chip embedding; component encapsulation; copper foil; dielectric composite build-up material; dielectric resin; electrical performance; heat management; leveling characteristics; material properties; microvias; optimized process yield; passive component; process ability; reliability; thickness distribution; two layer resin structure; Composite materials; Copper; Curing; Dielectrics; Fabrics; Glass; Resins;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference (ECTC), 2013 IEEE 63rd
Conference_Location :
Las Vegas, NV
ISSN :
0569-5503
Print_ISBN :
978-1-4799-0233-0
Type :
conf
DOI :
10.1109/ECTC.2013.6575744
Filename :
6575744
Link To Document :
بازگشت