Title : 
3D Chips can be cool: Thermal study of VeSFET-based ICs
         
        
            Author : 
Xiang Qiu ; Marek-Sadowska, Malgorzata ; Maly, Wojciech
         
        
            Author_Institution : 
ECE Dept., Univ. of California, Santa Barbara, Santa Barbara, CA, USA
         
        
        
        
        
        
            Abstract : 
Thermal management constitutes a huge challenge for CMOS or FinFET-based circuits, especially when chips go 3D. VeSFET provides an alternative thermal-friendly design choice. Device simulations show that temperature increase due to self-heating is very small for VeSFET transistors. At chip level, VeSFET-based 2-D and 3-D chips not only have much lower power density, but also have better vertical thermal conductivity than their CMOS counterparts. Peak temperature of a 10-die VeSFET chip is only 18K higher than ambient temperature. Temperature increase of a working 10-die 3-D VeSFET chip is 70% less than that of a similar CMOS configuration.
         
        
            Keywords : 
field effect transistors; thermal conductivity; thermal management (packaging); three-dimensional integrated circuits; CMOS-based circuits; FinFET-based circuits; VeSFET based 2D chips; VeSFET based 3D chips; self-heating; thermal conductivity; thermal management; CMOS integrated circuits; Conductivity; Density measurement; FinFETs; Heating; Thermal conductivity; 3-D IC; CMOS; VeSFET; self-heating; thermal;
         
        
        
        
            Conference_Titel : 
Electronic Components and Technology Conference (ECTC), 2013 IEEE 63rd
         
        
            Conference_Location : 
Las Vegas, NV
         
        
        
            Print_ISBN : 
978-1-4799-0233-0
         
        
        
            DOI : 
10.1109/ECTC.2013.6575912