Activation noise aware ultra low power diode based multi-threshold CMOS technique for static CMOS adders

The effectiveness of activation noise aware ultra low power diode based multi-threshold CMOS circuit technique to deal with activation noise and standby leakage current is evaluated in this paper. An additional wait mode is introduced to gradually dump the charge stored on the virtual ground line to the real ground line during the sleep to active mode transition. Ultra low power diode based MTCMOS technique reduces activation noise by 99.67% and standby leakage current by 44.13% as compared to trimode MTCMOS technique. To evaluate the significance of the proposed multi-threshold CMOS technique, simulation have been done for 16-bit full adder circuit using 90nm standard CMOS technology with supply voltage of IV.