Activation noise aware ultra low power diode based multi-threshold CMOS technique for static CMOS adders

Author

Sharma, Shantanu ; Periasamy, C. ; Pattanaik, Manisha ; Raj, Bhiksha

Author_Institution

Malviya Nat. Inst. of Technol., Jaipur, India

fYear

2013

fDate

4-6 June 2013

Firstpage

1

Lastpage

6

Abstract

The effectiveness of activation noise aware ultra low power diode based multi-threshold CMOS circuit technique to deal with activation noise and standby leakage current is evaluated in this paper. An additional wait mode is introduced to gradually dump the charge stored on the virtual ground line to the real ground line during the sleep to active mode transition. Ultra low power diode based MTCMOS technique reduces activation noise by 99.67% and standby leakage current by 44.13% as compared to trimode MTCMOS technique. To evaluate the significance of the proposed multi-threshold CMOS technique, simulation have been done for 16-bit full adder circuit using 90nm standard CMOS technology with supply voltage of IV.

Keywords

CMOS logic circuits; adders; integrated circuit noise; leakage currents; semiconductor diodes; MTCMOS technique-based ultralow power diode; activation noise aware ultra low power diode; active mode transition; charge storage; multithreshold CMOS circuit technique; standby leakage current; static CMOS adders; trimode MTCMOS technique; virtual ground line; Adders; Leakage currents; Low-power electronics; Noise; Switching circuits; Threshold voltage; Transistors; Multi-threshold CMOS; activation noise; forward body bias; sleep to active mode transition; standby leakage current;

fLanguage

English

Publisher

ieee

Conference_Titel

Emerging Research Areas and 2013 International Conference on Microelectronics, Communications and Renewable Energy (AICERA/ICMiCR), 2013 Annual International Conference on

Conference_Location

Kanjirapally

Print_ISBN

978-1-4673-5150-8

Type

conf

DOI

10.1109/AICERA-ICMiCR.2013.6575932

Filename

6575932