Decimal floating point format based on commonly used precision for embedded system applications

The widely used IEEE standards, IEEE 754-1985 based binary floating point format (BFP) and IEEE 754-2008 standard based decimal floating point (DFP) format uses high precision formats, which are generally useful for astronomical or scientific calculations. For simple applications, such a precision is not required and is an additional overhead. In this paper, a new floating point format, named Immanuel decimal floating point format (I-DFP), is presented. I-DFP can be used for embedded system applications, which uses commonly used precision. In I-DFP format, floating point numbers can be represented either in binary or binary coded decimal (BCD). A multiplier based on I-DFP, BCD based number system is developed and is functionally simulated. The multiplier developed is an LUT based BCD multiplier. The synthesis report shows that the multiplier can run with a maximum clock frequency of 198.499 MHz. Comparing the simulation results of I-DFP with the most widely used IEEE 754-1985 BFP format based arithmetic operations, it is concluded that the floating point operations are more accurate with I-DFP. The language used for programming is VHDL, and is synthesised using Xilinx ISE 12.1 design suite. The target device selected is virtex6 family, XC6VLX75T device. The results are obtained using ModelSim SE 6.2C simulator.