Title :
Highly scalable effective work function engineering approach for multi-VT modulation of planar and FinFET-based RMG high-k last devices for (Sub-)22nm nodes
Author :
Veloso, A. ; Boccardi, Guillaume ; Ragnarsson, Lars-Ake ; Higuchi, Yuji ; Lee, Jae W. ; Simoen, Eddy ; Roussel, P.J. ; Cho, Moon Ju ; Chew, Soon Aik ; Schram, T. ; Dekkers, H. ; Van Ammel, A. ; Witters, T. ; Brus, S. ; Dangol, A. ; Paraschiv, V. ; Vecchio
Author_Institution :
Imec, Leuven, Belgium
Abstract :
We report on a novel EWF engineering approach enabling wide VT modulation in aggressively scaled RMG-HKL planar and multi-gate FinFET-based devices with high aspect-ratio gate trenches. Key features include: 1) Al diffusion control from fill-metal (CoxAly) through an ultra-thin TaN layer on HfO2/TiN and fine-tuned TiN/ TaN thicknesses; 2) optimized TiN films for enhanced (NMOS) or inhibited (PMOS) Al diffusion through it. For a total TiN/TaN thickness of less than 2.5nm, low-VT NMOS planar bulk devices with σ(VT)~14mV at Lgate~30nm and AVT~1.98mV.μm are obtained. By increasing the bi-layer thickness to ~4nm a ~130mV higher VT is achieved with no JG nor EOT impact, and with the use of PDA resulting in an attractive ~10× JG reduction. >500mV ΔVT in narrow fin, triple-gate FinFETs (WFin≥5nm) enable low-VT NMOS with improved mobility and BTI, up to ~6.3× reduced noise, and JG ~0.16/1.9A/cm2 at 1V, 9Å EOT for VTlin=0.29/0.11V, respectively.
Keywords :
MOSFET; aluminium alloys; cobalt alloys; diffusion; hafnium compounds; high-k dielectric thin films; tantalum compounds; titanium compounds; work function; CoxAly; EOT impact; FinFET-based RMG high-k last devices; HfO2-TiN-TaN; NMOS planar bulk devices; PMOS; RMG-HKL planar devices; aspect-ratio gate trenches; diffusion control; effective work function engineering approach; fill-metal; multi-VT modulation; multigate FinFET-based devices; size 22 nm; triple-gate FinFET; ultra-thin layer; voltage 0.11 V; voltage 0.29 V; voltage 1 V; FinFETs; Hafnium compounds; Logic gates; Noise; Silicon; Tin;
Conference_Titel :
VLSI Technology (VLSIT), 2013 Symposium on
Conference_Location :
Kyoto
Print_ISBN :
978-1-4673-5226-0