Fabrication of GeSn-On-Insulator (GSOI) to enable monolithic 3D co-integration of logic and photonics

Author

Lin, J.-Y Jason ; Gupta, Swastik ; Yi-Chiau Huang ; Yihwan Kim ; Miao Jin ; Sanchez, E. ; Chen, Ru Shan ; Balram, Krishna ; Miller, David ; Harris, J. ; Saraswat, Krishna

Author_Institution

Electr. Eng., Stanford Univ., Stanford, CA, USA

fYear

2013

fDate

11-13 June 2013

Abstract

In this work, we demonstrate the low temperature fabrication of high quality GeSn-On-Insulator (GSOI) which forms the crucial module for monolithic 3DIC. The use of GeSn and Ge overcomes many challenges of monolithic 3D integration, including the need for Si-compatible high-mobility and direct gap materials. Furthermore, we introduce excellent passivation of the semiconductor/buried oxide (BOX) interface which is crucial to the high performance of devices on the stacked layers.

Keywords

elemental semiconductors; germanium compounds; integrated optics; integrated optoelectronics; interface roughness; logic circuits; modules; monolithic integrated circuits; passivation; silicon; three-dimensional integrated circuits; BOX; GSOI; GeSn; Logic; Si; Si-compatible high-mobility; direct gap material; electrical passivation; high quality GeSn-On-Insulator; low temperature fabrication; monolithic 3DIC. Co-Integration; photonics; semiconductor/buried oxide interface roughness; Aluminum oxide; CMOS integrated circuits; Fabrication; Passivation; Photonics; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology (VLSIT), 2013 Symposium on

Conference_Location

Kyoto

ISSN

0743-1562

Print_ISBN

978-1-4673-5226-0

Type

conf

Filename

6576674