DocumentCode
629186
Title
Bit Cost Scalable (BiCS) technology for future ultra high density storage memories
Author
Nitayama, A. ; Aochi, H.
Author_Institution
Center for Semicond. R&D, TOSHIBA Corp., Yokkaichi, Japan
fYear
2013
fDate
11-13 June 2013
Abstract
We proposed Bit Cost Scalable (BiCS) technology in 2007 as a three-dimensional memory for the future ultra high density storage devices, which extremely reduce the bit costs by vertically stacking memory arrays with punch and plug process. We´ve applied it to just NAND flash, which is BiCS Flash memory, and established the mass production technology. Moreover, we can apply the BiCS technology to various memories. The critical scaling issues and the comparison among various 3D-Flash-type memories are to be discussed, as well.
Keywords
NAND circuits; flash memories; 3D-flash-type memory; BiCS flash memory; BiCS technology; NAND flash; bit cost scalable technology; critical scaling issues; mass production technology; punch and plug process; three-dimensional memory; ultra high density storage devices; ultra high density storage memory; vertically stacking memory arrays; Arrays; Electrodes; Flash memories; Lithography; Logic gates; SONOS devices; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology (VLSIT), 2013 Symposium on
Conference_Location
Kyoto
ISSN
0743-1562
Print_ISBN
978-1-4673-5226-0
Type
conf
Filename
6576685
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