Quantum well band calculations and their impact on device isolation and work function requirements for SiGe and III/V strained heterostructure FinFETs

We calculate band offsets for FinFETs with strained SiGeand strained InGaAs-channels on strain relaxed buffers (SRB) and provide specific guidelines to optimize quantum wells, metal gate work functions, and mobilities for group-IV and group-III/V devices. Quantum well carrier confinement of 200 meV (or greater) for the channel strongly improves DIBL and SS for 10 nm-node FinFETs. Such quantum wells can be achieved for the following combinations: a strained-Si channel nFinFET on a Si_0.6Ge_0.4 SRB; a strained Si_0.4Ge_0.6 channel pFinFET on a Si substrate; or an In_0.53Ga_0.47As channel nFinFET on In_0.52Al_0.48As/InP. When increasing the In% above 70% for InGaAs channel nFETs, sufficient band offset is also achieved when the channel is directly grown on an InP or an In_0.4Ga_0.6As SRB. Both nand pFinFETs with SiGe-channels require n-type work function metals, while p-type work functions are needed for InGaAs-channel nFinFETs. Therefore a dual-work function gate scheme is required to co-integrate InGaAs nFETs and SiGe pFETs.