Distributed arithmetic based filters for satellite video signals demodulation

The paper proposes a method to use distributed arithmetic (DA) based filters to demodulate video signals on satellites. The demodulator uses a mixer, carrier recovery circuit, symbol recovery circuit and a Root raised cosine filter designed on DA based technique to implement the algorithm. Typical binary digital rates for digitized video are 3-4Mbps. To demodulate such signals, the number of MAC operations required by the filter is more. DA usage eliminates the need of multipliers when implementing MAC. This increases the operational speed and results in high filter throughput. The basic blocks of the demodulator are designed using VHDL and synthesized using Xilinx ISE 10.1.